Index of /~stefanovtp/courses/ES/papers

• Parent Directory
• Ch10_RunTimeDSE.pdf
• Ch11_ReconfugurableArch.pdf
• Ch12_ApplSpecProcessors.pdf
• Ch13_MemoeryArch.pdf
• Ch14_EmergingMemory.pdf
• Ch15_NoC_Design.pdf
• Ch16_NoC-based_Architecture.pdf
• Ch17_ParallelSimulation.pdf
• Ch18_MPSoC_Prototyping.pdf
• Ch19_HostCompiledSimulation.pdf
• Ch20_SoftwareTimingSimulation.pdf
• Ch21_TimingModels.pdf
• Ch22_Assertion-basedVerification.pdf
• Ch23_CPA.pdf
• Ch24_NetworkedRealTimeES.pdf
• Ch25_HW-awareCompilation.pdf
• Ch26_Memory-awareOptimization.pdf
• Ch27_Micro-levelSoCdesign.pdf
• Ch28_MAPS.pdf
• Ch29_HOPES.pdf
• Ch2_Quartz.pdf
• Ch30_DAEDALUS.pdf
• Ch31_SCE.pdf
• Ch32_Metamodeling.pdf
• Ch33_CadenceTechnologies.pdf
• Ch34_SynopsysVirtualPrototyping.pdf
• Ch35_GreenDatacenters.pdf
• Ch36_DSPCAD.pdf
• Ch37_CodesignCPS.pdf
• Ch38_WSN.pdf
• Ch39_TTA.pdf
• Ch3_SysteMoC.pdf
• Ch4_ForSyDe.pdf
• Ch5_MARTE.pdf
• Ch6_OptimizationDSE.pdf
• Ch7_HybridDSE.pdf
• Ch8_CrossLayerDSE.pdf
• Ch9_ScenarioDSE.pdf
• list_of_papers.txt